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Recent content by mitr

  1. M

    basic doubt on flyback converter

    one basic question ..regarding Flyback converter used for dc to dc conversion using isolation transfomer. My doubt is transformer cannot allow dc to flow from one side to the other side. In that case how it will do the dc to dc conversion. Regards Mitr - - - Updated - - - I think that in the...
  2. M

    diff between Memory mapped IO and IO mapped IO addressing.

    differenc between Memory mapped IO and Address mapped IO. Memory mapped IO uses the same address space for Memory and IO devices addressing. What I would like to ask is memory space inside the processor is dedicated for both Memory and IO access, Is my understaing correct? its not the external...
  3. M

    processor to sram 8bit,16 and 32 bit data bus interface selection??

    Hi, I have a processor which interfaces with sram, my question is it can interface with 8 bit data bus, 16 bit data bus or 32bit data bus right. which is the signal from processor side which controls the whether 8bit data is reading, 16 bit data is reading or 32 bit data? Can I even interface...
  4. M

    Why we cannot use one 2Gibt DDR2 ram instead of two 1Gbit DDR2 RAMs

    My query is if we have 32 bit data 2Gbit ddr-2 sdram and two nos of 1Gigabit DDR-2 sdram of 16 bit data interface, which of the two will have faster data access from the ddr-2 to the processor?
  5. M

    Why we cannot use one 2Gibt DDR2 ram instead of two 1Gbit DDR2 RAMs

    Hi, I have just googled a Winbond ddr2 sdram has the 32 bit data interface. I am not sure it is a standard data bit interface. I have seen 8 bit,16 bit but not 32 bit in DDR2. Below is the link for the datasheet. **broken link removed** My query is if we have 32 bit data 2Gbit ddr-2 sdram...
  6. M

    Why we cannot use one 2Gibt DDR2 ram instead of two 1Gbit DDR2 RAMs

    Hi, I have a doubt regarding the ddr 2 meomroy. I have processor to DDR2 interfaces where I am interfacing 2 nos of 1Gibt DDR 2 RAMs. Each Ram is 16 bit data wide. I am using 32 bit data from processor to two ddr 2 RAMs. Instead I can use a Single 2 Gbit DDR2 ram which is of 16 bit wide? In...
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