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Recent content by megzhuy

  1. M

    What effect the gain error and offset error in pipelined ADC

    RT. Is there any reference about this problem. I am going to design a pipelined ADC, but lack of basic knowledge. Is there anybody can give some useful suggestion or reference?
  2. M

    the question about the on chip charge pump for EEPROM

    Maybe you can use mos cap to save area and use dikson charge pump to get the voltage you want.
  3. M

    how to simulate capacitor mismatch of a pipeline SH circuit?

    By using the ideal amp,then run mento-carlo analysis, you can get the sigma of delta(c)/c. I guess.
  4. M

    How to calculate capacitor mismatch number from Spectre model?

    capacitor mismatch Check the documetation offered by TSMC, you can see the function of sigma.
  5. M

    Do you have any materials about current DAC?

    Do you have any materials about current DAC? Thanks!
  6. M

    Problem about POR(power-on reset)

    Sometimes por work after the bandgap, sometimes por begin to work because of the rise of the Vsupply. So two kinds of por is different, there are different kinks of solution to them.
  7. M

    How to design Gain Boosting AMP used in OTA

    I think the voltage change is not very large in the outputs of booster , maybe it's not neccessary to use SC CMFB.
  8. M

    How current mirrors are used to maintain fixed current while temperature changes?

    Current Mirror You can use Iptat plus Ictat, then you can get the constant current.
  9. M

    Do I have to design two CMFBs for two stage differential opamp?

    Re: opamp and CMFB- It depends on your circuit. If the gain of both two stages is very high, you need two CMFB. If one stage's gain is very low(<0.5), you don't need CMFB in this stage.
  10. M

    how to design a Variable Gain Amplifier?

    If you mean this kind of VGA is linear in dB and the outputs controled by the input difference of current, I read some papers about the function of (1+x)/(1-x)=e^2x, sometimes some one will use the current to fulfil this function,for example (I+I1)/(I-I1), the ratio of I1/I is the same meaning of x.
  11. M

    power on reset (POR) design on chip

    Does your circuit work like this? When the VDD begin to get higher and higher, bandgap work normally, after that, por start to work, then the chip begin to work. If your chip work like this, you can use your own idea.
  12. M

    How to generate a "process independent" current so

    I don't understand why you need this kind of current. PTAT is useful in chip.
  13. M

    Reference Buffer: For high Speed pipeline ADC

    Try to find some patterns or papers.
  14. M

    What voltage reference is used for Vref and Vcm in ADC?

    Voltage refs for ADCs The spec of 12bits Pipeline ADC about vref is always lower than 21ppm/%. So you can see bandgap is needed here.
  15. M

    Reference Voltages in ADC

    You can use the buffer to get the three different output voltage, but in real ADC design, it's always more difficult than this. You can find some papers of reference buffer. You need to see some datasheet to check the spec of your design.

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