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Dear Erikl,
Thanks for your suggestions. Unfortunately I am noy familiar with Hspice. I am in a bit with time constraint and unable to explore Hspice.
Would you please tell me is there anything else in your mind ? May be with Verilog A?
Any kind of advice is appreciated.
Kind regards,
Tanvir
Hi there,
I am trying to simulate mismatch in a 10 bit D/A converter and unfortunately my PDK does not support Monte Carlo Simulation.
At least to simulate the threshold voltage mismatch I am trying to create a voltage source or a set of voltage sources which will generate random voltage each...
Hi all,
While running Assura DRC on my Fedora 8, 32 bit macjine I am getting the following error messege:
On log file after running Assura
/usr/local/assura/tools/assura/bin/32bit/assura: error while loading shared libraries: libm.so.6: cannot open shared object file: No such file or...
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