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lcd ml405
How can I display "hello world" onto the Char LCD which is on the development board (ML405)?
I realized a similar topic has been posted. But our situation is a little different.
I want to do it the "software" way, i.e. write a C program and download it to the board.
Here's what...
I'm trying to generate a BSP so that my ML405 can display character onto LCD. I have been trying to find some tutorial online, but I couldn't find anything. Has anyone done it before?
Thanks,
Echo, as u can tell, i'm a newbie... =D thanks for the help. So you are not using implimenting the vernier technique?? Thanks. I'm going to digest ur suggestion now.
Banjo, Thanks for the help. Yup, the start trigger can go high any time.
Thank you very much for the ones who help!!! Can you...
Echo, i dont understand what u meant by "sample all the taps simultaneously", i dont quite understand rest of the stuff u mention either. Could you provide me more detail??
How can you achieve time measurement resolution of 120ps. Please feed me with more detail... Thanks...
echo, yes yes, i'm trying to build a time interval interpolator with vernier method so i can make the clock resolution higher... Any easy solution? MILLION THANKS...
banjo, i only have the reference oscillator, and a start trigger which isn't shown in the graph. When start_trigger signal goes...
Bis and laststep,
Yes, totally agree with you guys. If I it's impossible for two clock to happen at the same time. How can I design my fpga so that I can get the attaching waveform... Thanks in advance...
Banjo, ANDing them together doesn't help. For Example, if clk1 has a rising edge while clk2 is already high, clk3 will have a rising edge. But this is not what I want, i want to detect the moment when both clk1 and clk2 rise. Thanks...
Iouri, Yes they are from the same source...
Thank you very...
Dear All,
I want to stop my counter when clk1 and clk2 are coincidence.//rising edge of them happen at the same time...
The freq of clk1 = 100MHz
The Freq of clk2 = 100MHz * 16/17
Rising edge of clk1 and clk2 should eventually align together at the 16th cycle of clk1 and 17th cycle of clk2...
vernier interpolation
Dear All,
I'm working on a project about time interval counter using vernier interpolation principle to get a higher resolution. If you are not family with vernier interpolation, it's totally fine, coz my question is quite general.
Here's my problem:
Input: Clk_ref with...
ac couple dc couple
From my previous op amp building experience (which i post earlier), I know that I need to follow the datasheet, and build my circuit according to the schematics that's shown on the datasheet.
Here's my question tho:
When I was in school, I thought an inverting amp was just...
Re: Op Amp
Thanks a lot. I will try again tomorrow.
I'm using LM324, what rail to rail?
The way I set it up is:
[Signal Gen]-->[inverting op amp]-->[Oscilloscope]
Signal Gen: 33kHz
inverting op amp: Rf = 2K, R1 = 1K
I just want to see how the gain varies when I change the value of Rf. But...
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