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mahalakshmi r

Recent content by mahalakshmi r

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if condition under fork funtion

please anybody clarify that can put different "if condition" inside the fork and join condition? if possible means give one example please...
- mahalakshmi r
- Thread
- Oct 27, 2014
- Replies: 2
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
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ternary content addressable memory vs SRAM memory

i have planed to do ME project based on "SRAM based architecture for TCAM". The concept of the paper is implementing TCAM functionality in SRAM memory. it achieved by the content of tcam is mapped in to corresponding sram memory then sram act like tcam we can gat the advantage of sram and also...
- mahalakshmi r
- Post #6
- Sep 29, 2014
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
ternary content addressable memory vs SRAM memory

2. The slow access time comes because it can only search one localtion per clock cycle, and then it will take many clock cycles to match the data. Hence the massive latencies with a Tcam. Basically the larger the storage, the higher the latency. but i heard that tcam memory perform parallel...
- mahalakshmi r
- Post #4
- Sep 28, 2014
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
ternary content addressable memory vs SRAM memory

Ternary content addressable memory compared with static random access memory (SRAMs), TCAMs have certain limitations such as low storage density, relatively slow access time.. i have many doubts in its.. 1) what is the maximum capacity of tcam and sram? 2) tcam memory perform lookup operation at...
- mahalakshmi r
- Thread
- Sep 28, 2014
- Replies: 6
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
xilinx program can't run in quartus software successfully

this is my part of program, remaining code presented before it calculate either LP1 or LP2 have 'zz' value it means that 'zz' value contained variable(LP1 OR LP2) not considered for further operation i.e., neither 0 or 1. above you mentioned code formet of if LP1="00" then is correct bet i...
- mahalakshmi r
- Post #10
- Sep 28, 2014
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
xilinx program can't run in quartus software successfully

what i'm trying to do is priority encoder... from LP1 and LP2, select high priority one i.e., if LP1 is 00 and LP2 is no value then it selects LP1 as output of addout... note: here the reason for using 'zz' is that either LP1 or LP2 will have no value this is my PG project and my project...
- mahalakshmi r
- Post #7
- Sep 27, 2014
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
xilinx program can't run in quartus software successfully

thank you for reply.. then anyone know alternative code for above one..
- mahalakshmi r
- Post #5
- Sep 27, 2014
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
xilinx program can't run in quartus software successfully

i have only done in simulation only.. the error made in quartus software is obtained result wrong.. 'zz' is not supported then what is the correct formet please tell me...
- mahalakshmi r
- Post #3
- Sep 27, 2014
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
xilinx program can't run in quartus software successfully

process (LP1,LP2) begin if (LP1="00" and LP2="ZZ") then addout <= "00"; elsif (LP1="01" and LP2="ZZ") then addout <= "01"; elsif (LP1="ZZ" and LP2="10") then addout <= "10"; elsif (LP1="ZZ" and LP2="11") then addout <= "11"; elsif (LP1="00" and LP2="10") then addout <= "00"; else addout <=...
- mahalakshmi r
- Thread
- Sep 27, 2014
- Replies: 11
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
tcam memory implement in sram architecture

in tcam memory data word is input & not address. for example in router application input word is source and destination port address. so it is a address why we consider this address as data word in tcam memory.. please differentiate this two and tell me possible input to tcam memory...
- mahalakshmi r
- Thread
- Sep 26, 2014
- Replies: 1
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
tcam memory parity bit generation for parameter extractor

thank you for reply.... but i have doubt that binary word with this unknown term can defined by even or odd parity?
- mahalakshmi r
- Post #3
- Sep 26, 2014
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design
M
tcam memory parity bit generation for parameter extractor

please any tell me, whether parity bit calculation possible in tcam memory parameter extraction.. i.e., xor operation can perform unknown x(either 0 or 1) value. another one is, if binary word has unknown term we can say that word is even or odd parity?
- mahalakshmi r
- Thread
- Sep 26, 2014
- Replies: 3
- Forum: PLD, SPLD, GAL, CPLD, FPGA Design

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mahalakshmi r

Welcome to EDAboard.com

Recent content by mahalakshmi r

if condition under fork funtion

ternary content addressable memory vs SRAM memory

ternary content addressable memory vs SRAM memory

ternary content addressable memory vs SRAM memory

xilinx program can't run in quartus software successfully

xilinx program can't run in quartus software successfully

xilinx program can't run in quartus software successfully

xilinx program can't run in quartus software successfully

xilinx program can't run in quartus software successfully

tcam memory implement in sram architecture

tcam memory parity bit generation for parameter extractor

tcam memory parity bit generation for parameter extractor

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