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why the voltage at the drain of NM0 is 2Vbe? I think the current is decided by I0, Q0 and DZ17 are current mirror.
could you say some more about the independent current or provide some reference? does it generated by NM0 and the Vbe?
I did little on this kind of circuit.
thank you
This part is just to provide a DC operation point, works like current mirror and use the buffer (opamp) to insulate the two BJT. it's not related to the independent temperature, actually there is no independent temperature current generated.
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hi, according to your description, you are working on the 13.56M RFID, right?
If it's a passive RFID Tag, the regulator is much better than LDO, and 1mA current is quite huge for passive RFID. the psrr and sr depends on your application, you need to consider the load circuits first,
then go back...
This depends on the resolution of your DAC and the variation of the resistor. you can find in the fab's document. if you don't use the central symmetric, add some dummy at least.
The basic requirements is inclued in DRD,
if it is the digital, the width of metal 1 should be
the same with the metal in standard cell,
in analog, IR drop should be taken into consideration.
who are so kind to provide me these two papers, I can not find and download them.
these are both about LNA, I found them on a lecture, but it did not mention the exact name.
Bevilacqua, ISSC 2004,
C.-W. Kim, JSSC 2005
Hi, who know what is the mainstream efficiency of DCDC power management?
I ever found some productions which is higher than 98%, I wonder what is the mainstream now and what is the goal for the industry of power management.
Thanks!
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