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Recent content by louiee

  1. L

    PLL design in 30khz~50khz

    thanks for your help, i am sorry if it is not clear, now i try to design PLL which designed using CMOS 0.18um technology (ic design not a system design) for the application of ranging from 30khz to 50khz. my concern is, normally PLL which I found designed on chip is applied on the Mhz range...
  2. L

    PLL design in 30khz~50khz

    Hi everyone, I would like to ask, is it possible to design PLL which the carrier frequency is around 30khz to 50khz (input.Freq. for PFD)? what are the issues for PLL if designed in such frequency? bcoz normally PLL is used in frequency of Mhz range. thanks in advance, louiee
  3. L

    single to differential converter

    Hi everyone, how to convert the single ended to differential signal? my working frequency is quite low around 38khz. how to do this on chip? i try to use low pass component i.e resistor and capacitor in balance diff amp, but it will be too huge for this low frequency. thanks in advance.
  4. L

    [SOLVED] transimpedance amp. Need helps!

    Hi guys, I was given a task to design transimpedance amplifier for infrared receiver IC in 0.18um CMOS. My current input range is 800p to 200uA. I will use single input PIN photodiode as input signal. Do you guys know how to convert single input to differential without disturbing signal...
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