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In my simulation, the scan in ports are connected to a stimulator module, the stimulator module assign value from stil/wgl file, and the stil/wgl scan in ports contains "Z", so the DUT scan in ports are driven by "Z". and after run simulation with vcs and the dumpped waveform also show the scan...
what is high z logic
In my simulation. all pins for test is driven by one source outside the chip, How may/can other driven come from in that situation?Could you give me an example?
when will scan out go to highz states
I found that some High-Z input to scan-in port in a DFT stil/wgl file, what will ATE do when pattern in High-Z?
I think High-Z means not connected, and that means the input port is floating, and after a gate(like NOT or AND logic) it must be...
fsdb reader
I use debu$$pli for vc$7.2 to dump out fsdb and use -ssf to read it, but warning report:
1> This fsdb file has higher verion(4.1) than the current FSDB Reader(2.3), so that it does not know how to read it.
what a funny thing! How can the debussy not read the fsdb it dumped?
Is...
In Agilent Advanced Design System, I found some tutorial about PhaseNoise using PhaseNoiseMod, and to its output, named wire as VCO_OL, but at some equations, it use VCO_OLout=VCO_OL[1], is this VCO_OL[1] a member of result data array? and what's the other member of this data array stands for...
I read some papers that Power amplifier need hamonic balance, and heard that it's very important and necessary, but I dont know what hamonic balance used for?
I look for some theory, tutorial and other articals about this
Thank you very much.
I made a board as this schematic to get 32.768K clock source, but it couldn't generator 32.768K clock freq. I saw more than 60MegaHz at TP25, What's wrong? I don't know how to do to get 32.768KHz clock?
any suggestion? or any other fine schematic that could generate 32.768Khz?
thank you~~~
I want to manager our document automatic, is there any software can do?
if it can do like:
support account,
right set and manager,
searching,
......
any body could give out a good software?
thank you....
I programmed my xcf32p and it config my vlx60 successful. but when I make a encrypt .mcs file and download it to 32p, download the .nky to vlk60, push the reconfig button, but vlx60 do not work, it looks like not config probably, the fpga done pin did not go high. what's wrong? is there any...
my orcad version is 10.5,but so far as I know, nc-verilog could only simulate verilog file, could it simulate mix with resistors,capacitors and verilog file?
sorry for my poor english.
What I want to simulate is:
I have designed out the schematic. in the schematic, it contain one fpga device. In orcad, we can simulate the schematic with resistors,capacitors and other components. But I don't know how to simulate a schematic with FPGA device and some...
I want to simulate my system:
One Virtex4 fpga and some other LEDs and others, I have all rtl file(writen by verilog) for the virtex4 fpga, and the schematic of the FPGA and other parth are aready designed by orcad Capture.
Can I simulate this system(FPGA and other part)? How to? Could you...
Thank you first
KA SERIES looks like connect two board forever, but I want to separat two board freely and may connect another board with the same interface.
thank you all the same and any other helps?
I want to connect two board with amba 2.0 interface with Figure/slot or other connectors, I don't know which is the best, anyone give me some useful information?
thank you.
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