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Hi,
I have simulated the below circuit in LTspice and found that the BJT (Q203) is having less power dissipation (~1mW) then the Q202 BJT.
However, the designer selected a 200mW package for the Q203 and 100mW for the Q202.
Can anyone help me understand what am I missing here? As per my...
Spice model is working fine. I checked with the test jig example.
1594111900
So as I suspected that I am doing something wrong with the current sources. I looked once again at the DAC datasheet and found out that it is a current sink device. That means the IOutA pin actually sinks the current...
Thank for replying.
I added the two current sources as you said but still not getting the result. Is there any other configuration I can try? Thanks.
1593609751
yes I am getting what you are saying. If I reduce the current to 5mA then I am getting sine wave-output. But that means that the...
Hi,
I am designing a +/- 10V output DAC board using a current output DAC (PN : AD9767ASTZ).
So I am already using a reference design for a Evaluation Board from here. The board can be configured for the different outputs. I am interested in the 3rd type for making +/- 10V signal output...
High speed driver for driving large number of lines simultaneously
Hi,
I am working on a mux board design. I am using an 8:1 mux with 3 selection lines and digital pin input Capacitance of 2pF(typical). The total number of mux ic is 256. Which is controlled by the FPGA pin having drive strength...
Hi,
See this one, it is being used on a commercially available FPGA development board https://www.mouser.in/ProductDetail/STMicroelectronics/STLM75M2F/?qs=sGAEpiMZZMvrYgwxMvI%2fG0drJUl0wuTU
or you can go for a less expensive LM75 series.
For interfacing if Pin number is an issue then i would...
Thanks for the answering. Regarding the base resistor https://www.technogumbo.com/projects/Learning-to-Use-an-Optocoupler-or-OptoIsolator/ I read it here point no.3.
Also can you tell me which configuration is good or is more robust than other. Pull Up or Pull Down.
thanks
Hello,
I am making a module to read the output from the magnetic reed switch working at 24V@20 mA using and FPGA.
For isolation i am using optoisolator 4N25. I am attaching the pics below for the configuration. Please let me know if there is something i can do to make this more robust.
I am...
Hi,
I need to select a rs422 differential line receiver. So far i have selected the two Ic :
1. MAX3096
link - https://www.mouser.com/ds/2/256/MAX3095-MAX3096-103140.pdf
2. DS26LV31T
link - https://www.ti.com/lit/ds/symlink/ds26lv31t.pdf
3. AMS26lv32
link -...
Since i don't have access to the advanced software i am doing it manually.
Can you have a look at the attached image of the calculation according to the Timing. Signal flight time is matched.
Am i on the right track or am i missing something?
Thank you so much for the help.
regards
I am doing single rank ddr3 routing in a 6 layer board with the following stackup:-
Signal(L1) -> Gnd(L2) -> Signal(L3) -> Pwr(L4) -> Gnd(L5) -> Sig(L6)
(I am using Saturn PCB Toolkit for calculations)
Via 1 (L1-3)
Via 2(L1-6)
Height of Via
12 mil
38 mil
Step Response
4 ps...
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