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Recent content by lincoln2

  1. L

    To understand Verilog primitives...

    try something like this: #1000 $finish; it should be more interesting after toggling some signals link
  2. L

    LED connection to FPGA

    similar thing happens to me on digilent's Nexys 2, it only happens when the pin is defined in the constraints file but not connected in the top module. most common with the decimal point of the 7 segment display. on my tom modules i have a "house keeping" section after the internal variables...
  3. L

    LED connection to FPGA

    well on the top is using a 10k and on the bottom there is a 330 ohm closer to the fpga! if you want to know which is better, all things being equal I would probably put the resistors closer to the fpga. The bottom one will be easier to remote one of the leds. depends on your board layout.
  4. L

    How to put the reg value in this color LCD controller code?

    reg [7:0] colour =8’d0; 1. I think you are going to have to specify a bus width for all of your reg(s) 2. better expland from: forums.xilinx .c0m /t5/Synthesis/What-s-the-initial-value-for-a-register/td-p/55077 link

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