Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by lakshminarayanan

  1. L

    Register assignment for diff. width

    NO the remaing bits is not assigned for the register..... i am transferring the content of one register of different width to another register......
  2. L

    Register assignment for diff. width

    In my design i used to assign a 3 bit register to 15 bit register........it works well in simulation ......will it be having any synthesizing problem.......or backend problems......Is there any restriction for usage of it....... module tt(.....); reg [15:0] a; reg [3:0] b; ...
  3. L

    Error LNK-2005 and multiple defined object

    i inculded global.h header file in more than two c code file and the compiler stats the error multiple defined object and error lnk-2005 .....how to solve the issue... The header file starts with #ifndef _GLOBAL_H_ #def _GLOBAL_H_ // variable declaration // function declaration //...
  4. L

    memory architecture for a fpga based design.......

    i dont want the details regarding the memory controllers............depending upon the input to my module........the memory utilization varies for my module ......i.e. one input may require 10 MB [external] while other different value ....In "C" we will be using the malloc or calloc.......so...
  5. L

    memory architecture for a fpga based design.......

    i need to have external memory for my FPGA design ....what is the limitation and any reference model of FPGA based external memory design and details regarding this could be got from where...
  6. L

    fwrite in verilog....

    fwrite in verilog The problem is fixed by the suggestion given by nand_gates........i am using the modelsim simulator in win xp ................
  7. L

    fwrite in verilog....

    verilog fwrite while using the fwrite in verilog....... as mentioned below.... $fwrite(file,"a=%d @=%d",a,addr); if the value of a is negative i am getting the data in the file as.........for eg....-1 as 65535 but i need to print it as -1 in the file do any one know other format of writting...
  8. L

    Limitation of always blocks

    Maximum how many always block can i have in a module what is the maximum limit.....for it help me with some suggestions.....

Part and Inventory Search

Back
Top