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Recent content by kpsai26779

  1. K

    What is the difference between the design of Digital ICs (Backend) and analog ICs?

    Backend & analog Hi Master, Digital IC backend consists of P&R also, regarding circuit design of digital ICs (std cells) and analog circuits we will almost use same tools but issues we deal with are different as analog design requires more specifications.
  2. K

    need tutorial to draw layout

    CMOS -circuit design, Layout and simulation by R. Jacob Baker
  3. K

    Flip Flop timings issues

    Hi amit, Better way to under stand timing concepts is by practicing different examples But practice by drawing "wave forms " rather than simple equations for some basic concepts see topic
  4. K

    Why Nand Gates are considered more than NOR

    Hi santu, Nand Gates are more preferred than Nor gates, in CMOS technology only. both resistance and capacitance effects the delay and this is reason for selecting NAND compared NOR gate
  5. K

    Please recommend a good network textbook

    HI, Data Communications and Networking 4e · Forouzan Computer Networks A S Tenenbaum
  6. K

    looking for few examples of ram rom interfacing

    exemples of ram Hi mannnish, You can refer 8085 Microprocessor book by ramesh goanker
  7. K

    about bandwidth.......

    Hi anoop, you given two transfer functions but you didnt mentioned is they are in parallel or cascaded.
  8. K

    Help me with mtech university project

    msras+vlsi Hi thyagaraj, Sam's advice is nice, If you have any reference in VLSI companies you can try for interns and you can do ur project and you will get industry exposer also
  9. K

    Suggest me some books about communication

    Suggest books Hi ednan, communication systems by Kenedy will give you good idea about basics. For analysis go for communication systems by simon kaykin 2nd edition.
  10. K

    need tutorial to draw layout

    Hi deepak, This pdf will help you upto some extent to get basic idea about design rules
  11. K

    How to draw the state diagram for a divide by 5 circuit in FSM

    Problem in FSM Hi anand, can you tell me when will o/p become 1 other than transition from S3 to S0
  12. K

    need tutorial to draw layout

    Hi deepak, I dont have any tutorial for layout design, but I can upload Layout book if you want and also for good layout engg it is must to know fabrication process ( wat is the sequence of masks that we will use)
  13. K

    How to draw the state diagram for a divide by 5 circuit in FSM

    Problem in FSM Hi anand, ur FSM is working good for 101, 1010 but not 1111, 11110 Thanks & Regards
  14. K

    What's best for the clocked process sensitivity list

    Hi omara, Wat I mean to say is if you are using asynchronous reset then you can include reset in sensitivity list and for synchronous reset dont include reset in sensitivity list. It depends on your application, but both asynchronous and synchronous resets have their own advantages Hope now...
  15. K

    Why the power consumption of cmos is low?

    cmos Hi sachinmaheshwari, For CMOS static power consumption is very low, which can be neglected and the total power consumption is almost equal to Dynamic power consumption. CMOS circuits have high ip impedance so ip current is almost zero so less power is required to supply to drive load

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