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Hi,
Thanks for your apply,
I also think they are independent, according to simulation the quantization error of the duty ratio can be reduced by average several measurement, so I think the pdf of duty ratio should have a shape with expectation at zero.
Is there any way to find the exact pdf...
Hi,
Many thanks, I agree with your formula, but I am not sure how will the division change the PDF, according to Fig(3) the pdf of the numerator Δt''+Δt''' is a triangular distribution and I think the denominator Δt'+Δt''' should also have the same distribution, I have searched on the...
Hi,
Sorry I forgot to explain.
Yes, \(N_k\) is 4.
\(N_k\) means the number of counter during \(Δt_k\)(when the square wave is low).
The duty ratio of the square wave between \(Δt_k+Δt_{k+1}\) can then be calculated by \(\frac{N_k}{N_k+N_{k+1}}\)
If the frequency of the counter is finite, then...
Hi, I am using a counter to measure the duty cycle of a square wave, as shown in Fig(1).
Fig(1).
The width of the time interval Δtk can be calculated by \( Δt_k=(N_k-1)T_0+Δt'+(T_0-Δt'')=N_kT_0+Δ_q\\where Δ_q=Δt'-Δt'' \)
The errors Δt' and Δt'' can be considered as random variables...
Hi,
I am trying to import pspice .cir file into cadence spectre and I have successively generated the schematic graph. However, when I run the simulation, some errors appear.
Here are the errors
Here are the settings in schematic
Here is the .cir file
* AD817 SPICE Macro-model
*...
The Input voltage will be a step voltage not a sine wave. I have tried some single stage OTAs (single pole OTA usually don't have stability issue), but the integration voltage is not a straight line, which means I can not calculate the input current through output voltage when the integration...
It is a amperometric sensor readout circuit used in electrochemistry, the readout circuit is a TIA which integrate the current prom previous stage and transfer it in to voltage. The current will be changed if the voltage of the input amplifier change. The huge resistor and capacitor is the...
I am trying to design two amplifiers in this kind of system, and I think I need to test the open loop performance of the amplifiers before applying them to the system.
could anyone tell me how to find the loading of these two amplifiers in this kind of system?
Very thanks for your reply and simulation, I have checked the connection and they seems correct. I think maybe as FvM said bellow there is something wrong with my feedforward path and turns in to positive feedback.
I am wondering any structure can drive capacitive load from 1p to tens of nF...
I am trying to use feedfoward compensation in multi-stage OTA for driving large capacitive load. However, it always oscillate, and PZ analysis in cadence spectre always shows RHP pole in my amplifier..
The circuit I have tried are all from journals. Here is one example...
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