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Thank you, jbeniston.
Thank you wwfeldman:smile:
The 'fixed' value of the estimated power is not an 'average expected' power in a logic. Right?
Then, when the estimated power from the first method could be used? (just curious about it, I will use the second method. Thanks))
Can I have one...
Hello, I have a question about the method of power estimation.
I have two ways to estimate the power of my logic.
1) first one is from design compiler. When I synthesize the logic, a power report is generated in the directory of ./report... I think this does not use vcd file.
2) Second one is...
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