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Recent content by kidmanbasha

  1. K

    Analog VLSI design training/courses in India

    Watch the analog design lectures by berkeley webcast.berkeley.edu
  2. K

    difficult fundamental question: about delta sigma modulator

    Re: difficult fundamental question: about delta sigma modula From the block diagram it appears that ff is the quantization noise and not qq. qq seems to be thermal noise because its not shown in the diagram. But anyway thermal noise doesn't undergo noise shaping.
  3. K

    Sigma delta adc design in Simulink

    Re: Sigma delta adc design There's no need for adding that second summer because you only add it to make analysis easier (linear) for you as a designer. Matlab has no problem analyzing non linear systems. You should add a comparator/quantizer, this will be useful for comparing your analysis to...
  4. K

    MDAC biasing question -simulating OTA properties in feedback

    MDAC biasing question. I am designing an MDAC for a pipelined ADC. I am having a problem with verifying my OTA design. The input transistors of the OTA need some bias voltage to operate at saturation. I know the required range of bias voltage needed. The problem is that this OTA is connected in...
  5. K

    video corses about communication circuit design

    Re: video courses **broken link removed**
  6. K

    Biasing questions - what is the bias point?

    Biasing question Do designers size up the transistors according to the specs then simply hook them up in current mirrors to bias these transistors? How do you guarantee the current mirror is giving the right bias point? How do you know what the right bias point even is? (concerning a load...
  7. K

    Problem designing a simple common source amp

    I have attached a PDF file explaining everything because I show lots of plots. Please download it and see. I think anyone here can know the problem easily because its just a simple common source. Thanks
  8. K

    Looking for design examples

    Thanks erikl. But I am in need of design examples where it is shown how the sizes were chosen and so on. i.e. educational design examples
  9. K

    Looking for design examples

    I am looking for opamp/ota design examples in any technology. Please help.Thanks
  10. K

    Ideal Opamp in Cadence (Single Ended)

    I can't find an ideal opamp in cadence that is single ended. I only found one that is differential ended. I don't know verilog A so please help.Thanks
  11. K

    How to let cadence save several op points in a feedback amp

    I want to let cadence generate several op points and not only one in order to simulate gmro vs Vds and stuff like that. I know how to plot op point parameters. I just wanna know how to have several oppoints for several Vgs's.Thanks
  12. K

    Step response questions, stability problem, compensation

    step response 1- When a step signal is applied to a common source ( or any circuit with a feed forward path) at the time the input pulse is rising, the output of the common source is also rising in the same direction and not the opposite although the gain of the CS amp is -ve. This happens...
  13. K

    Feedback question from EE240's slides

    You told me not to mix between F and f. Acl=1/f*[fAo/(1+fAo)] =1/f*[To/(1+To)]=1/f*[1/(1+1/To)]=-(Cs/Cf)*[1/(1+1/FAo)] and in the above equation you first assumed To=Ao*f then you assumed To=Ao*F I understand that F is a capacitive divider. But how can we just replace f with F in the above?
  14. K

    Feedback question from EE240's slides

    feedback question In this slide the "c" declares the ideal closed loop gain. What I really can't understand is how did the feedback factor "f" turn out to be that equation written down? Isn't that shunt-shunt FB (current in - voltage out)? So the feedback factor should be -Cf ? I'm sure what's...
  15. K

    Plotting Vth while sweeping L from the tree

    Re: Plotting Vth against L oermens, what does the command that you stated do in comparison with the save M0 : oppoint command?

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