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[code]
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity post_normalize is
generic(wE:positive:=6;
wF:positive:=13);
Port ( ck,rst:in std_logic;
a : in STD_LOGIC_VECTOR (wF-1 downto 0)...
hi,thanks for suggestion
i replaced following portion of code.
p2:process(clk,n_diff_i,nA_e,nB_e,s,co,rst,nB_f)
begin
n_diff_i<=conv_integer(nA_e-nB_e);
if rst='1' then co<=a1;
elsif rst='0' and clk='1' then
if n_diff_i=0 then co<=a2;
elsif n_diff_i>0 and n_diff_i<13 then
co<=a3;
else co<=a1...
hi,i am writing the code for right shift.it is synthesis without error.but several warnings are generated.warnings are stated after code.please give me idea to remove this error.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity...
this is my code for fir filter.i want write the output in "to_file" text file.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_TEXTIO.ALL;
use std.textio.all;
--use work.utils_pkg.all;
library work;
use...
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