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hi every body,
i am doing a project in which i want to implement the cdma concept i.e., transmitting two or more message signals simultaneously at the same time through same bandwidth.i have generated two messages( one msg is all one's and another is all o's)
i spreaded those two...
baudtick
hi every one i want to generate a clock frequency of 9,600 hz (serial communication )
from a frequency of 33.33Mhz using pll
i am using altera cyclone kit
pls help me how can i generate
thank you for u r reply i will try u r suggestion.
by the way , in how many ways we can connect FPGA to computer
i know one method---using RS232 port
are there any other methods
i am using cyclone kits
hi every one ,
can any body explain or provide some material on how to calculate BER using FPGA.
i am doing a project in which i want to compare different FEC techniques (like convolution codes,reed solomon codes etc) i want to implement in FPGA(cyclone--altera kits)
how can i do this ...
not operational: clock skew > data delay
hi every one ,
i am doing a project related to cdma .i wrote code for my system i am not able to meet timing requirement(according to compilation report).how to get rid of this waring.
"Warning: Circuit may not operate. Detected 8 non-operational...
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