Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello, thanks for the reply.
These were my input signals:
Vin+ = 750mVdc, 500mVac 0 phase
Vin- = 750mVdc, 500mVac 180 phase
Replacing R13-R14 for inductors in the range of THenries worked. I connected my second stage and this is what I got:
Thanks for your help!
I was not sure how to update on this thread.
I believe the original picture I had shown you did not have the first stage voltage output matching VCM. You can see now it is close to 600.9mV (VCM=600mV)
Once again please disregard the second stage.
The first picture here should show you the DC...
Sorry about the lack of details. First, thanks for the reply. I figured I should have attached the schematic from the beginning.
Some details on this circuit, C23 and C22 are the load caps. They are both 1pF. Any other cap present, has a load of 10pF. I have the feeling the feedback circuit...
Hello All,
I am wondering if you can help me with an issue I am running across with a fully differential amplifier.
I am able to set all my FETs in saturation and the common feedback circuit I am using appears to be working.
When I run the STB analysis using the cmdb probe and run a DC analysis...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.