Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by jesuraj

  1. J

    What is the reason for the present state and the next state changing simultaneously?

    Re: state changes Thanks for ur reply.The code is working properly.
  2. J

    What is the reason for the present state and the next state changing simultaneously?

    HI, I am in the proces of designing a scrambler. When i use the testbench to check the functionality of it,it works fine when inputs are passed as with certain delays. The test bench is like this: initial begin #20 descram_en = 1'b1; ck = 64'h649dbdbe0cf0cfcb; #20...
  3. J

    what will be the output of the following code

    always @(clk) begin a = 0; a <= 1; $display(a); end

Part and Inventory Search

Back
Top