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Recent content by jaloud

  1. J

    How Can I get +12,-12 and GND from battery 12v Dc?

    Hi all, I'm going to design a circuit and it need to (+12, -12 and GND) Dc volt. So, how can I get these voltages from Dc battery. if a positive terminal of battery is +12, and negative terminal is -12.Then where is GND ? thanks,,
  2. J

    Verify RTL Report in accelDSP

    hi , I am going to implementation my matlab code into FPGA. I am using accelDSP to do that processing but, there is an error in Verify RTL step. any one knows ---> what is mean of " could not calculate values " in Verify RTL Report. see the picture Thanks ,,,,,,
  3. J

    how can i connect these two devices ?

    Thanks all no problem , your circuit is clear . I get your idea and I think , it is good because the O/P of 555 is 9 v .
  4. J

    how can i connect these two devices ?

    Thanks Keith and what do you mean ?? ,, what is problem ?? at high freq. if I choose the time of 555 ciruit 1 min , does relay work fine ?
  5. J

    how can i connect these two devices ?

    I designed " 555 timer " circuit . I want connected 555 circuit with other device that acts at 220 V for example lamp acts at 220 v and 100 w I want operation lamp for 1 hour how can I connect two circuits ( timer and lamp ) ?? Thanks in advance
  6. J

    how to measure inductance?

    hi, try this link .. **broken link removed**
  7. J

    how to improve simple FM circuit ??

    Thank you so much for these important observations. Now, I am working to improve input source, feedback , ...
  8. J

    how to improve simple FM circuit ??

    hi all, i want ask you about ... 1. how i can transmit my message in narrow bandwidth ?? 2. how i can reduce a noise " i want clear sound " ?? for example **broken link removed** this circuit is working ,, if you choose C3 and L1 Properly thanks
  9. J

    vhdl code of 32 bit counter

    hi, see the same topic at but do small change , from 127 to 31 and signal count: std_logic_vector (31 downto 0):= (others=>'0'); but that without " reset " thank
  10. J

    VHDL code of counter 128bit

    hi all, I have written a code of 128bit binary up down counter as shown library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity COUNT is port ( CLK, co_di: in std_logic; counter : out std_logic_vector(128 downto 0))...

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