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Recent content by hubo8918

  1. H

    Please Help! LVS check error

    I add the .subckt of the RCA cell and solve the problem. However, it gives me a new error, which says "noting in layout".
  2. H

    Please Help! LVS check error

    ! Hi, I run the LVS check it says"source primary cell "RCA" not found in source database". The RCA is my library and top cell name. The schematic is import from verilog netlist file using verilogin. Then export hspice netlist using the ADE L. Thanks in advance
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