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Recent content by honnaraj.t

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    28v power supply design

    Hi, I want to design a DC-DC converter to get 5V from 28V(DC). The following are requirement has to match 1) The unit should operate with a power supply with a nominal voltage of 28V. 2) The unit should operate correctly in the input voltage range of +16V DC to +31.5V DC 3) The unit should...
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    Xilinx's Video timing controller IP

    Hi, I am using Xilinx's "video timing controller ip" for my image processing pipeline/design. I have downloaded hardware evaluation license for the ip. I have implemented this along with other ip's. I am facing following issue 1) I am feeding input to this ip, but it's out is always 0. 2)...
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    Need help to find rite Processing unit

    hi everyone, It will be great help, if we explore right methodology to "find rite processing unit" for application. I am looking help from your side. Statement: user right application program in C. Size of the program is 1MB (by considering instruction and data) data for program...
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    PhD in Digital VLSI- Help Reg

    hi, Dude i had done enough research on doing PhD. According to my knowledge if you want PhD for name sake do it in any B-grade university in India. how ever if you have any ambition or passion to come-up with your own product or technology which will drive future in electronic industry then...
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    VGA SYNCHRONISATION ISSUE

    HI, Issue : we are trying to display SRAM content on VGA MONITOR... I AM MAINTAINING resolution 640x480 timing wave form.......the complete screen is moving... not displaying static screen........... for SRAM driver i am using sclk(12.5 Mhz )..which is synchronize with the...
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    HELP in vhdl............. challenging one

    basically that I/O is SRAM data bus...........
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    HELP in vhdl............. challenging one

    hi, it will help me lot if any body suggest solution for this....thanks in advance..... problem:= i have two PORT signal both are INOUT... from the different module....i wanted to connect this two signal through MUX.... (since multiple driver i am using MUX) ..... problem happening that...
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    Generating Delay less than Clock Period

    hi, it will help me lot...if any one solve this problem.... problem: how can we generate a delay which is less than clock time period. example: If my clock is 20ns period... how can i generate 8ns delay in vhdl. i am using CPLD. no option to use PLL.. this should happen through...
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    Part time PhD on VLSI in INDIA

    phd in vlsi thanks for replay.... i would like to know what is the procedure to apply...in IIT and IISC
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    Part time PhD on VLSI in INDIA

    phd in vlsi I am staying in Bangalore. i am Developing Graphics Processor (opengl compatable ) on FPGA.
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    Part time PhD on VLSI in INDIA

    part time phd in india Hi, I am working in Electronics company (avionics R&D). I finished my M.tech (VLSI AND EMBEDDED SYSTEM) and joined to this company. i have one year experience now. I am planning to do part time Ph.D .... any one can suggest me how to go further.... regarding...
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    Part time Ph.D on VLSI in INDIA

    phd vlsi Hi, I am working in Electronics company (avionics R&D). I finished my M.tech (VLSI AND EMBEDDED SYSTEM) and joined to this company. i have one year experience now. I am planning to do part time Ph.D .... any one can suggest me how to go further.... regarding university, professsor...
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    BUGS AT SRAM DEVICE - i am not able access SRAM

    Re: BUGS AT SRAM DEVICE thanks for reply... THE following signals are required to access SRAM... and i am generating that but not getting.. content of the location
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    BUGS AT SRAM DEVICE - i am not able access SRAM

    BUGS AT SRAM DEVICE HI, I am using CYCLONE-II DSP Development Board for my coll project.. in project i need to use SRAM available on the board... i programmed in VHDL. i maintained all the requirment specified in the data sheet... but i am not able access SRAM... please tell me any thing...
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    Approximation of multiplication product

    Thanks for replying..... i am bit confused regarding : if we multiplied n-bits * n-bits = product is definetly 2n-bits ..........if we want to assign this 2n-bit product to n-bit (register) which gives an error........ if we repeat multiplication 4-5 times on same data my results will go very...

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