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Re: i2c 50ns spike
Rajesh,
Could you please provide any documents for the design of glitch filter that explains the working of glitch filter.
How to choose the values of C and MOS (W/L) ?
What is the architecture of schmitt trigger to be used ?
Thanks and regards,
Gururaj B
Hughes,
A very comprehensive expln. of Noise summary. Thanks a lot. I was able to get the noise summary.
I now need to calculate the SNR of my DAC output.
How do I go about it. Please help.
Thanks and regards,
Guru
After the transient simulation, open the calculator and u vl find 'vt' button. Press the vt button and select the net in the schematic.
Then select the 'dft' function from special functions and give the required data.
Now select 'dB20' button and press 'plot'.
I got what you said wrt DAC area for unit cell based on INL.
I am also trying to design a 10 bit DAC taking into account INL, DNL and mismatch parameters.
For the 1X unit cell(LSB), I am trying to use two series connected pmos devices.
But I am not able to get the correct value of current. Why ...
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