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DFM
It depends as to whether you being a layout designer will clean ur blocks for DFM as well or whether the foundary will take care of it post layout (for 130 nm & above.).But what i have observed is-on 90 nm and below ( 65 nm , 45 nm), the layout designer is asked to clean the DFM as well ...
Hi,
Can anyone explain the following rule -
Never do common centroid matching for RF devices. Merge implant & diffusion of devices where possible (like the common source differential transistors) & double feed gate poly from both the side.
My question is - why common centroid matching is...
Related to Inverter
Hi..can you all pls elaborate, becoz wht my reasoning is-for pmos , if 0 volt is applied to gate , with vdd connected to source, then pmos turns on......so current will flow from source to drain......
but if instead of connecting pmos source to vdd , i connnect it to ground...
In an inverter we connect pmos to vdd, nmos to gnd...
wht happens if we do viceversa??i.e pmos to gnd or vss, and nmos to Vdd ? will it still function as inverter??If so why??
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