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Recent content by gnseeta.btech

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    dumping the code on FPGA kit ...

    In my project i need to detect that whether the circuit under test is faulty or not by glowing the led on the board.i need two led's for 2 outputs.one led for indicating the circuit correctness and the other indicating the test done. i have developed code in such a way that one led should glow...
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    dumping the code on FPGA kit ...

    actually i dnt use any ip cores sir. i have developed verilog HDL code for built in self test(BIST) which is the combination of linear feedback shift register(LFSR),c432 combinational benchmark circuit,multi input signature register(MISR),transition response analyzer(TRA),BIST controller. i...
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    dumping the code on FPGA kit ...

    i have verilog HDL code with me sir. I have done configuration to spartan3e xc3s1200e board i have got the output on kit. when the same code configured to saprtan3 xc3s400 device i m not getting the output.i have done the recompile( resynthesize, place, route, sta, and bit file generation) with...
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    dumping the code on FPGA kit ...

    verilog HDL code sir...
  5. G

    dumping the code on FPGA kit ...

    sir i didnt understand what u said. can please tell me more clearly sir?
  6. G

    dumping the code on FPGA kit ...

    sir actually when i dumped the code in spartan 3e 1200E kit i got the output on the kit, but when the same code dumped on spartan3 Xc3s400, pq208, i didnt get the output on the kit sir...
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    dumping the code on FPGA kit ...

    hello, Can anyone tell me is there any posibility that code got executed in the fpga spartan3e kit, not executed on spartan3 kit eventhough succesfuly got dumped but not getting the output. i will be very thankful for answering....
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    [Moved]normalized and average power

    good afternoon sir what is the difference between average power and normalized power in vlsi design?
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    [Moved] project msic vectors using xilinx xpower analyzer

    i am doing project on msic vectors.could anyone please tell me how to calculate average and peak power using xilinx xpower analyzer...
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    test pattern generator...

    hello, im doing m.tech project.could anyone suggest me how to extend the paper "Test Patterns of Multiple SIC Vectors: Theory and Application in BIST Schemes" to get a better result.im going to implement using verilog.actually my idea is to modify the test pattern generator.can anyone...
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    vhdl code for bist...

    memories sir. I am trying to develop a code for the paper named " a new BIST Architecture for low power circuits". In this paper they proposed a new bist architecture which consist of mask circuit which allows only desired test vectors such that the switching activity will be reduced thus the...
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    vhdl code for bist...

    hi, myself naga seeta m.tech 2nd year doing my project on bist.could any one give me an idea how to start the code for bist architectures for low power circuits...
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    implementation of spread spectrum clock generator on tanner?

    hi, i need help on how to implement spread spectrum clock generator on tanner tool,plz help me.....
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