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Ive got the following error when importing into virtuoso, this happens for every instance.
"The referenced cell "IOA22D0" was not found. The OpenAccess design data was created for this cell without any reference. Ensure that the referenced cell exists and library is defined in the cds.lib...
I’m currently using the TSMC 90nm LPHP technology library to synthesize designs, the process is as follows:
VHDL CodeRTL CompilerSynthesized VerilogEncounterGDSII Stream
I want to then be able to pull the design into virtuoso for simulation however I’ve tried various ways and can’t get the...
Carrying on with the UMC libraries ive gotten the hang of buildgates and silicon ensemble and also creating .sdf for simulation in modelsim. Now I want to check my designs in spice after P&R, I was told the problem is that we dont have the spice information (only the basic design kit) for the...
Re: 64bit CPU on linux
Doesnt apply know, there using HT links togethor with on die memory controller and full speed PCI-X slots to boot in thier high end motherboards.
Well said, another thing to note, my university recieved a complete tool set from Mentor, Cadence and Synopsis I was supprised at how many of the applications were AMD64 compatible!
My university is trying to sort out the Silicon ensemble and buildgates software packages, the requirement is to do timed simulation of a standard cell library but iam not sure how to do this. Build gates will synthesize the design from vhdl and silicon ensemble will convert the design to gds2...
Re: 64bit CPU on linux
The answer is simple, EDA tools (especially spice) rely on FPU performance hence AMD will allways perform better regardless. Also the 8000 chipset has FULL driver support (mature, fast and stable) in Redhat 3 where as the new xeon platform DOES NOT HAVE ANYTHING PLUS THE...
umc018
Hi, people i have the UMC 0.18u techfiles but iam not sure which is needed for IC 5. It is the standard cell library and I want to create my own layouts using the cells.
1) which files do I need to use.
2) how do I load it into cadence IC
Any version, WS, ES, AS are identical they only differ in handware support (number of CPUs/RAM etc..) and default installed applications. For DUAL Processor workstations you should be using WS and nothing else.
Re: 64bit CPU on linux
MODELSIM AND CALIBRE are available for Opteron both 64-bit, FPGA advantage isnt far away aswell as precision synthesis. I not clear about the IC 5 64-bit but considering its one of the major tools I suspect there is priority on it but I cant see it comming this year
Re: Hardware Configuration
Id use the new RHEL 3 if your going to be using EDA tools, they are currently being updated for that distribution. It is available for 32-bit x86, 64-bit AMD 64 and 64-bit Intel EMT. I would avoid the Intel EMT as the memory performance is very very bad due to the...
Hi, iam using UMC 0.18u standard cell library in leonardo spectrum via fpga advantage. Iam not clear on the process of the flow. After synthesising a design I want to then obtain a real model to simulate in modelsim i.e. with delays etc.. some how using the .sdf format. Ive tryed various...
Hi people, I have some model files from my UNI using TSMC 0.18u process. I want to simulate designs just using the model file, yes there are things missing but iam only doing very rough power estimations between different processes. How can I do this, when I start a new design without a tech...
Your comparison isnt really fair, I agree linux will be faster however your comparing Hspice v2001 to v2003 and probably has a good deal to do with yor results. Windows has gotten better for EDA but anything to do with IC design should be done on LINUX. As for the K8 id watch the chipset you...
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