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Recent content by gavanbash

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    SAR ADC switching energy calculation

    Hi You can find your answer here 👇👇 https://ieeexplore.ieee.org/document/1464555
  2. G

    3rd harmonic in opamp

    It is simulation results. I'm using this opamp in SC circuits which works at 120MHz sampling frequency.I'm using 0.2V pk-pk and use 1.2v as supply voltage. another thing is that I use 90nm CMOS technology.
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    3rd harmonic in opamp

    when we use this opamp with 80dB distortion in SH I think it doesn't make a problem but when I use it in the pipeline adc, this 3rd harmonic appears in the spectrum and decreas SINAD so I want to know that where is the problem in opamp in order to decrease 3rd harmonic and increase SINAD in...
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    3rd harmonic in opamp

    Hi everybody. I have a big problem with 3rd Harmonic. I designed an opamp with 68dB gain and 360 MHz B.W and 60' phase margin. when I used this opamp in the S.C sample and hold Circuits it has a large distortion in 3rd harmonic. I'm going to know which element of my opamp makes the most...
  5. G

    maximum width of transistor in 90nm process

    I'm at design level and I want to know if this size is large I test another design procedure.
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    maximum width of transistor in 90nm process

    Hi I designed an opamp which has four transistor that their width are 300 um.My quastion is that when I'm using 90nm CMOS process in my project, having transistors with this width(during drawing layout and fabrication) make problem or not? Does this amount for width is huge or not?
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    bias voltage independent with temperature

    Re: bias voltage indpendant with temparature Thank you You saved my time. with best wishes
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    bias voltage independent with temperature

    bias voltage indpendant with temparature Hi I'm using this circuit in order to stable bias voltage from derivation with temperature as Daivid Jones in analog circuits design said. In order to making stable all of gm transistors in folded cascade opamp I'm using this circuits. Does it true? My...
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    [Moved]: opamp ac simulation circuits

    Hi everybody How can I obtain gain and bandwidth and phase margin in folded cascode opamp? Does anybody has a circuits model to implement it in hspice? Thank you.
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    [Moved]: problem in phase diagram of opamp

    Re: problem in phase diagram of opamp Thank you for replying Could you explain your reason? please. I don't understand it. I guess that I have a low frequency zero but I can't handled it that why is it happen? Could you give an advise for solving it or which book I have to read for increasing...
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    [Moved]: problem in phase diagram of opamp

    Re: problem in phase diagram of opamp thank you for replying Could you describe what did you say. please I can't understand it.
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    [Moved]: problem in phase diagram of opamp

    Re: problem in phase diagram of opamp This is the results of open loop ac simulation with hspice.
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    [Moved]: problem in phase diagram of opamp

    hi everybody. when I designed my opamp in output node Isaw this plot for phase of output where is the problem and how can I handle that?
  14. G

    sweep parameters in cadence/hspice

    it is easy you can simulate all of your inverters at same time with different output names and show them in cscope. So easy best wishes
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    hspice convergence issue help

    Hi You can find a good option control at hspice help document but I want to advise i another way. I think you should take a look at your circuits because convergence problem will occur when you have a high current in your circuits which hspice can stop it so hspice stop the simulation. if you...

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