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Then, would I need to instantiate the LEF macro in the netlist?
I mean how would the logical connections etween my standard cell design and the Macro would be defined once I I generate a LEF file?
Could you please also tell how I can connect my MACRO to the standard cells?
Example:
1. I have...
I have a doubt. How do you instantiate/attach the lef files into your physical design .
Details of my question:-
1. I used innovus to get the GDSII for the processing system.
2. I want to add an ADC (full custom) to the design. I have made the layout in virtuoso.
3. How can I pick the layout...
I want to add an ADC to the RTL to GDS flow of my SoC. I have the layout (GDS) of the ADC. How to do this?
I have access to Cadence ans synopsys toolchain. I have done the RTL to GDSII flow for the Processing system part.
But since ADC is non synthesizable(Full custom). I have no clue how to...
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