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Recent content by fasmatikos

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    Booth vs CSD Multiplication?

    Basically the csd recoding will result in n/3 (in average) partial products while booths algorithms always gives n/2. This is due to the fact that the csd recoding is more efficient and alwas results in the minimum number of partial products that will then be added propably with a CSA tree and a...
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    solutions for Thomas H Lee

    please................................................super sos
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    help with CLA Adders in VHDL!!!!

    You just have to implement the main CLA block whit the Propagate-Generate units and then use this as component to build more complicated cla adders
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    Simple 3-band equalizer in NIOS

    anyone?????? please.................
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    Simple 3-band equalizer in NIOS

    Hello, I was wandering if anybody can give me a hint about by litle project......I have to implement a 3-band (low-band-high-pass) equalizer in NIOS using UPIP audio core. I have a little problem with programming Nios in C...... I also have implemented this EQ in TI's C6713, using Matlab for...
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    NIOSII audio core help

    Hello there, I do my 4th year Project in department of physics University of patras in greece, and i want to build an audio based niosII system for audio processing....my first task was simply to use nios for an audio in - audio out application with no processing but i have difficulties on...
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    which book for Verilog HDL

    This book help me aout a lot.............. Verilog for Digital Design by Frank Vahid, Roman Lysecky
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    [SOLVED] NiosII Sytem - Master Thesis! Any Idea?

    thanx breno for your suggestion! I will look into it ;)
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    [SOLVED] NiosII System ...Master Thesis! Any Suggestion

    hello everybody, I am just about to take my master thesis on digital system design...My supervisor asked me to come with an idea about a NiosII system..............What do you suggest me to do, that will include a niosII system ? We will use the @ltera's DE2 board. My field is more vhdl....than...
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    [SOLVED] NiosII Sytem - Master Thesis! Any Idea?

    hello everybody, I am just about to take my master thesis on digital system design...My supervisor asked me to come with an idea about a NiosII system..............What do you suggest me to do, that will include a niosII system ? We will use the Altera's DE2 board. My field is more...
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    Computer Architecture

    free download computer organization john hayes An amazing book : Computer Architecture a Quantitative Approach" by Patterson.!!!
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    How to write data to address array of dual port RAM using VHDL?

    VHDL Dual port Ram It takes "address_0 " which is an std_logic_vector , converts its equivalent integer and use it as pointer for the mem array...Its pretty much the same as c/c++ programming.................... for example address_0 <= "00100" then conv_integer(address_0) --> 8 mem(8)<=data_1...

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