Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Yes, i've checked this file, but this question i've posted is on exercises section, and this file that you sent only shows the solutions for questions on problems section.
Hi, everyone. Please, I'm trying to solve an exercise at Sedra & Smith (Microelectronic circuits) 5th edition. It is the exercise 9.33 that says: "If the input bias current of an Op Amp, used as an output adder in a 10-bit digital analog converter, must not be greater than the equivalent of 1/4...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.