Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi all,
I am having problems with Synopsys Design Compiler (version 2007-03-sp1) and VHDL fixed-point library. I have mapped to lib ieee_proposed the files fixed_float_types_c.vhdl and fixed_pkg_c.vhdl taken from the archive "Synopsys.zip" on the "VHDL-2008 Support Library web page".
I am...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.