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Recent content by driveforce

  1. D

    current mirror problem

    source degeneration is just put some impedance/resistor between the source of transistor and gound. by doing so, you have to also take headroom and noise issues into consideration.
  2. D

    gm/iD design methodology

    which paper are you talking? Can you provide title of that paper?
  3. D

    Berkely EE240 lecture notes

    berkely ee240 2007 should have same notes as those in 2006 **broken link removed**
  4. D

    Triode region of NMOS transistor

    channel length modulation has less impact?
  5. D

    How many stages of op-amp should I use for a charge pump?

    Re: question on op-amp depends on your application. but generally, no more than 2
  6. D

    Use of DC operating point parameters in cadence

    cadence display gm operating point you have to sweep vgs first, then using the browsing function, which can be found in caluculator
  7. D

    Need help on level shifter problem!

    I didn't see this kind of level shifter before. why not using cross coupled diff pair without tail.
  8. D

    current mirror problem

    some things can be applied. 1. longer channel length 2. cascode 3. source degneration
  9. D

    How to place transistor in layout XL (ic5141)???

    shift+f allows you see all layers layout contrl+f takes every cells and sub cells as just a box.
  10. D

    Berkely EE240 lecture notes

    berkeley ee240 **broken link removed**

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