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Recent content by dreamscome

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    2 Dimentional Input/Output Port in Verilog

    It is one of the limitations of Verilog...
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    How to dump fsdb in ncsim?

    fsdb dump in ncverilog Cool. This solved my problem. Thanks man...
  3. D

    How to dump fsdb in ncsim?

    ncsim dump fsdb Yes, I tried this. I guess it's some kind of PLI setup error.
  4. D

    How to dump fsdb in ncsim?

    ncsim fsdb I was trying to dump fsdb in ncsim by using the cmd "ncverilog +loadpli1=${DEB_PLI_FILE}:debpli_boot xxx" But I got this error: ERROR: ACC PLISVG The routine acc_object_of_type() cannot be applied to an object of type <unknown>. Use the SystemVerilog VPI...
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    All Synopsys Tutorials

    ftp.synopsys.com lab Yes, we need workshop documents! Who has it?
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    Using the DTMF tutorial and libraries for SoC 5.2

    Re: soc 5.2 version where to download tutorial?
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    02.11n wireless LAN latest specifications

    Hi, does anybody have 802.11n wireless LAN latest spec?
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    Clock Tree Synthesis - CTS

    Let Tools do that for you
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    Whats the layer stackup for 4 layered board?

    layer stackup it depends. generally is Top Ground Power Bottom
  10. D

    new graduate, wanna find a job on RFIC, I'm in CHina.

    Couples of Campany you can go. go to www.51job.com and search.
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    Linux for IC 5.1.41 ?

    AS3 is better
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    Installing Windows Apps on Linux.

    Is Wine free?
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    Newbie to PC programming!

    I recommend u start with C
  14. D

    Capture to Concept HDL

    Now capture CIS is a part of cadence PCB

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