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After making my FSL core local in the system assembly view, the
implementation results in the following error:
ERROR:HDLParsers:3014 -
"D:/j_code/fsl_flash_lab/edk/pcores/fsl_kalman_v1_00_a/hdl/vhdl/fsl_kalm
an.vhd" Line 6. Library unit matrix_pkg is not available in library...
Hi,
i have made one project in simulink (.mdl)
just a 2x2 matrix multiply
i used xilinx blockset toolbox for making 2x2 matirx multiply with the help of muliplier, add/subs, convert,gateway blocks etc.
actually i am making a 32 bit width 2x2 matrix multiplier..
In model block of 2x2 matrix...
hi,
i am facing this problem mentioned below in the utilization summary..
i have made filter code in system generator then generate vhd for the
same.
when i am running this vhd code in ISE and synthesis, i am receiving
this warning..
how can i remove this warning?
Device utilization...
I need one help. Please if you able to help me i will be very grateful for your kind help.
There is one tool in Xilinx, System Generator.
I have prepare one architecture using blocks from Simulink in it. i am getting good results
then i have generate the VHDL code through HDL CODE GENERATION...
hello,
when i am generating division core ..this particular warning is oming..
WARNING:sim:471 - The chosen IP does not support a VHDL behavioral model, generating a VHDL structural model instead.
WARNING:sim:472 - The chosen IP does not support a Verilog behavioral model, generating a...
thanks for your valuable time..
if possible for you, can you please explain in detail with the example..
as for Variable x : matrix_4x1 :=
("000000100",
"0000000000",
"0011110000",
"0010110001");
please look after it...
thanks and Regards
Thanks for the reply..
you are right..but this is the case when you have single variable std_logic_vector, in my case its a matrix of 4x1.
Variable x : matrix_4x1 :=
("000000100",
"0000000000",
"0011110000",
"0010110001");
how can i shift each row of this matrix?
Dear
Question: how to shift left or shift right t
Rough program as follows
library IEEE
...
...
Package matrix_types Is
Type matrix_4x1 Is Array (1 to 4) Of std_logic_vector (7 downto 0);
Type matrix_1x4 Is Array (1 to 4) Of std_logic_vector (7 downto 0);
Type matrix_4x4 Is Array (1 to...
yes u r right...thanks...
may be my understanding is not that good, but those who are good in any area they wont underestimate others..
i m accepting m not good in vhdl...but this is not a way to treat to beginner...
nevertheless, thanks a lot for ur deep concern...
hi, please help me out...
i have a constant value let A:=9
now i have to convert into digital form...
as we know in digital we can write this 00000000000000000000000000001001 for 32 bit data...
another example i have A:=34
we can write this 00000000000000000000000100010
i want this type of...
its a little part of my program in VHDl...
here A is signed and 31 downto 0, where K_temp is signed and 33 down to 0;
A :=matrix_mult_1x2_2x1 ( matrix_mult_1x2_2x2 (H,P),H_prime )+R;
K_temp := "01000000000000000000000000000000" / A;
actually error arise at K_temp because A is different from...
actually its a vector type...
A:=("01001010000001000010000000000000")
A is signed and 31 downto 0..its a 32 bit vector...
i have to take inverse of this...
Hello,
I need your help urgently for calculating inverse of the matrix.
for example i need to calculate the inverse of the following A matrix where A is signed. how top do this? please help.
A:= ("0100", "0010")
Re: <INVALID OPERATOR> must have constant operands or first operand must be power of
ok thanks...
lets wait others are able to understand my problem or not...
ok please tell me one thing...in cut short
there is,
Variable K_temp : signed (31 downto 0);
Variable A : signed (31 downto 0);
A...
Re: <INVALID OPERATOR> must have constant operands or first operand must be power of
thanks for the reply...
as you are suggesting i did the same before also..but still there were an error...
please have a look in K_TEMP...there is an error...
regards
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