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Re: Simulation of BRAM
hi,
i just want to confirm that is VHDL simulation(modelsim) support .mif file????
or we have to convert it into .hex????
if Yes Pls tell how?????
with thanx,
Dinesh
Hi,
pls help me out from this thing is that i generate BRAM using coregen with .cof file also and when i try to simulate the Design in model sim then error is coming like fail to open vhdl file ram_block.mif(memory initianilize file) in rb mode.Why is it so???????
I am in big trouble,pls...
hi,
i am using core gen to generate block ram and initializing the BRAM using .cof
file,is this best way of initializing thd Ram
Is it really going to work when you are going for implemention in FPGA.
pls any body give me some other idea how to initialize Bram.
with thanx.
IIT,Delhi
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