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Hi again. Down to logic, my little experience and the simulation clock should work well, but it doesn't. I've been in lab for a while today to test it and result was very, very disappointing. I have made simpler version which is working well. Here's the code:
library IEEE;
use...
Welcome everyone!
I'm beginner in VHDL-coding and I've lack of experience with CPDL-designing. I've project to do... It should work as simple LED-display-tester on the Xilinx XC9500 Device. I've only ISE Webpack to compile and simulate the code in home. But I don't know if it have chance to...
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