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Recent content by devika v kurup

  1. Image0490

    Image0490

  2. Image0492

    Image0492

  3. Image0491

    Image0491

  4. sesame field

    sesame field

    my village , Onattukara , is an area of paddy and sesame fields. A snapshot from our sesame field, near my house.
  5. Image0753

    Image0753

  6. Image0752

    Image0752

  7. nila

    nila

    A river in India in the state of Kerala
  8. devika v kurup

    What is pseudo rotation?

    What is pseudo rotation and real rotation?
  9. devika v kurup

    SINE and COSINE calculations using COiRDIC Algorithm

    Here is the code. --MAIN PROGRAM library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all...
  10. devika v kurup

    SINE and COSINE calculations using COiRDIC Algorithm

    SINE and COSINE calculations using CORDIC Algorithm Hai, I am new in this world of fpga. I am trying to code cordic algorithm in vhdl. i want to divide a signed number by a power of 2. i know it can be implement using a shift operation. i searched about syntax of arithmetic shift and got...
  11. devika v kurup

    [SOLVED] beginner in vhdl::code for frequency counter

    I made a test bench of 1000ns instead 1s. Now it is working and counts all the events in the unknown input. But i want the frequncy of unknown input. Clock frequncy=50MHz,ie 20ns, clk divider output frequency=1MHz ie, 1000ns. Can you verify and correct my code? CLOCK DIVIDER library IEEE; use...
  12. devika v kurup

    [SOLVED] beginner in vhdl::code for frequency counter

    Here is my code. library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primitives in this code. --library UNISIM; --use UNISIM.VComponents.all; entity clk_div...
  13. devika v kurup

    [SOLVED] beginner in vhdl::code for frequency counter

    Hai, I'm a beginner in VHDL coding and trying to write a code for frequency counter consisting of a clock divider ,count gate (AND gate), counter. I need a 1second clock as the output of clock divider. ise simulator is not responding while i create a 1second test bench. Could you help me to code...
  14. devika v kurup

    what is 2D and 3D transistors

    Forum for Electronics - devika v kurup - Blogs This may be helpful for you.
  15. devika v kurup

    Digital image processing

    JPEG 2000 is an image compression standard and coding system. It was created by the Joint Photographic Experts Group committee in 2000 with the intention of superseding their original discrete cosine transform-based JPEG standard (created in 1992) with a newly designed, wavelet-based method...

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