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Recent content by dejwid30

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    Problem with uart transmitter code vhdl

    Hello I'm writting a code for a transmitter and I don't know what I do wrong in my code or what I must add to my code? Thank You for help Here is my code: library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity transmitter is port( CLK_50MHz : in std_logic; --rx : in std_logic; tx...

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