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hi, I have a question regarding noise in general. Say I have a cap of value 4C. then I have a total KT/C noise of KT/4C. Then if I use 4 identical caps of value C each and a switch in each branch, then the total noise is still KT/4C? It is quite hard to visualize as at the moment when the...
you can run a transient and then use calculator to specify which points are used for FFT, you should see distortion there. Be sure you sampled when the op settles.
to simulate gain and phase margin, you need to cut the loop somewhere to simulate. For the common mode loop, you can use a vcvs to extract the output common mode, then use another vcvs to give it an offset to load it on the cmfb input of the opamp so that the common mode can close.
generally if you need high bandwidth and single pole settling you go with folded cascode. for switched cap that is most common.
if you want high output swing then two stage.
if you need to drive resistive load then class AB.
there are many other criteria that you would know from experience.
Re: How? to Design 1-order Switched Capacitor Sigma Delta AD
just grab the book from Richard Schreier " Understanding Delta Sigma Converter"
and start from there.
spectre how to set minr
I don't think omitting a 32m ohm resistor would matter that much. If you are really worried, put a 1 ohm resistor in the simulation and see if it degrades your result a lot.
Re: Telescopic opamp again!
1. Sure you can and it is recommended. Otherwise you would end up with many
different common mode voltages which complicates design.
2. To achieve optimum biasing, which means if you have three NMOS or PMOS stacked, you are targeting to have a output headroom about...
hi, my next project is to design a continuous delta sigma with about 14 bit linearity. Anyone could give me a jump start by pointing me to some easy to read paper as a starting point? Thanks for the guidance.
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