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i'm sorry, but i'm looking for 'structural' design of multiplier or to be exact an '8*8 bit array multiplier'. another thing is that would it be possible for me to design 10*6bit array multiplier?? TQ
---------- Post added at 16:12 ---------- Previous post was at 16:09 ----------
i'm sorry...
Hi.....i'm new to this verilog coding....so how i wonder if anyone can help me with this....
i'm trying to translate this arithmatic into verilo code:
verilog=x -( x3/3) + (x5/15)
here what i've done but it did'nt work!!
module top (a,product);
input [15:0] a;
output[15:0]product;
reg...
hi...i currently working mu final project that would need me to use this conversion. Here what i'm trying to do:
1. let say i have this number in decimal 6.23456. I want to multiply this value with other value (integer) and display the result ( in fraction num) on seven segment using verilog...
hi, im new to this forum, i'm not sure if i'm in the right forum. Anyway...i want to ask if anyone can give me a basic info about MAX196/198 DAS. I want to use it as 4 channel input ADC and i'm planning to interface this ADC to FPGA. Anyone know how.?Please help me....really desperate here.:cry:
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