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Dear all,
For the Ringing on SW pin(a Buck DC-DC, CCM mode), how to analyze it and how to deal with it?
At system-level, maybe we will Immediately think of adding R and C...
How to analyze it(which factors involved) and how to eliminate in chip design?
Having no idea...
Thank you in advance.
Hi All,
The Hspice 2010 has been installed and integrated with ADE of IC5141.
However, during the launching of IC5141, a warning message appears:
"could not restore method, undefined generic asiGetCommandLineOption Hspice_Session"
I don't know its meaning... I'm not sure whether it will...
Hi all,
Please see the figure below.
I think it should be a centre-tapped transformer(a tap should be added, the red part). So is it a mistake here?
Thanks!!
Hello All,
Enclosed is a LC ‘lattice-type’ balun, the method to calculate the value of L and C is also given.(quote from: www.rfic.co.uk)
My question is: Does this kind of balun also play a role as an impedance-matching network? If so, what kind of match does it achieve? I don't understand the...
Hi All,
I have a question here. Does the slide below means that the gain peak can enlarge the closed-loop bandwidth? How can I understand this qualitatively?
Many thanks!!
spectre pz analysis
if set eval freq.=200K:
****************
PZ Analysis `pz'
****************
Warning from spectre during PZ analysis `pz'.
Bipolar Junction Transistor - frequency dependent components are present in
the circuit, approximated as AC equivalents at 2.000000e+05Hz...
spectre jacobian nonisolated
Hi, all
:?::?::?:
When we do DC analysis to a topology which contains a start-up circuit,
does the solving procedure have nothing to do with the time-domain?
thanks very much for ur answer!
Hi, all
Under the cadence schematic design environment, I get a device symbol from the PDK, then attach it to it's model file. In that case, the simulation result is strange and wrong.
If I get the symbol from the analoglib, the simulation result will be all right.
I don't know what happened...
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