Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Keith,
The opamp opa2171 and the FET is a Fairchild FDD8778
This is for a product and the way the customer is currently doing it to switch the power. I don't believe it is an option to change this.
Thank you for any help
Russell
I am working on making a linear constant current LED driver. Attached is a circuit that I have used and works but has some issues(this is a simplified circuit)
The circuit works well and is pretty simple accept. I need to be able to Dim the LEDs by PWMing the input power. When doing this when...
Dave
That seems to have fixed it.
Basically I will use the STARTUPCNT for other timing but will not do some if statements if STARTUP = 1.
I had to changed my if statement to maintian(get) this functionality
if STARTUPCNT = "0111111111111111" and STARTUP /= '1' then
Thank You
Russell
Spartan 3 with Xilinx ISE11.5
I need to make some routine that will delay some routines on my FPGA for a set amount of time. The code I have chosen to do this is below and is a simple counter with initial values.
I also have a variable that will change to 1 once the counter has counted to a...
I am trying to make an integrator using signed math and I don't want to it to overflow.
INTEGRATOR: process (CLK1MHZ, IG, ERROR)
variable INTGT : signed(5 downto 0);
begin
if rising_edge(CLK1MHZ) then
INTGT := INTG + ERROR*IG;
if INTGT > "00100" then
INTG <= "00111";
elsif INTGT <...
My
WARNING:Xst:643 - "C:/VHDLPrograming/Nano/DNPREV01/position.vhd" line 183: The result of a 16x16-bit multiplication is partially used. Only the 31 least significant bits are used. If you are doing this on purpose, you may safely ignore this warning. Otherwise, make sure you are not losing...
I have been working on converting my code from using integer math to signed math.
I am using
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
in my code I am multiplying to signed 16 bit numbers.
signal SINE_IN : std_logic_vector(15 downto 0); --From ADC
signal SINE_TABLE ...
FvM
Thanks for the help that got it working. I was under the mistaken impression that the process would only run once 1 thing in its sensitivity list changed.
I am trying to program a shift register or running array(32 positions) that I can add one integer to (indexing all the rest of the points down and dropping off the last one), do some math, and then add another point.
Here is a simplified version of the code.
library IEEE;
use...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
