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Recent content by charan teja

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    Derate Calculation for Advanced On Chip Variation

    Hi Subhash , First let me tell you the difference b/w ocv and Aocv. Hope this clears your doubt. Ocv adds derates to all the logic b/w two regs or on clock path , but that much pessimism is not necessary to all paths bcz all paths dont have equal logic b/w registers. So we are adding extra...
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    Minimum distance b/w 2 macros ??

    Hi friends , can somebody give the correct equation for this ?? Thanks in advance.
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    Physical Design Engineer Freshers openings ??

    No Body is aware of openings or references ?? Too das :( Thsnka, Charan
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    Physical Design Engineer Freshers openings ??

    Hi Friends , If there are any openings in physical design for freshers(Trained in PD) in some startups or any of your working company or if you can help with some references , please put it here so that many can get to their first job in life. Reasonable Replies appreciated. thanks...
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    NDR --> Non Default Rule or Non Delay Rule ??

    Hi Friends, What is NDR ?? where in the flow do we use them ? would like to know abt it in detail if anybody can explain. Thanks in advance. Thanks, Charan Teja
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    Sheilding of clock nets

    Hi friends, I know we will sheild the clock nets for crosstalk purpose, but my question is upto what level ? clock runs the entire design , so will we sheild clock upto leaf level ? Also is there difference b/w sheilding with VDD or GND ? Thanks, Cherry
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