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Recent content by blue_wings_

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    Determine the successive bits in a std_logic_vector

    thank you very much all. Think that my job is not simply.. first i should try to implement with small number of bits. j_andr:))i must consider your code too..
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    Determine the successive bits in a std_logic_vector

    we imagine that there is a selecting device which must be programmed by using vhdl. it must sellect a big product.If the product is big then it must be pushed down from the strap on the device by using airpistol.There are lots of detecting elements and laser ,which should rays the product...
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    Determine the successive bits in a std_logic_vector

    yes all bits should be examined at the same time. :(
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    Determine the successive bits in a std_logic_vector

    I can reduce the number of bits. Actually there is a signal on labview and it has 2040 bits i should send this signal to fpga and then examine it.Like i said i can reduce the number of bits but i havent imagine yet how i can implement it in vhdl...
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    Determine the successive bits in a std_logic_vector

    Hii all; i am pretty new vhdl user and i am trying to solve a problem,which is difficult for me nowadays . I have two std_logic_vectors.First one has 5 bits,which must have (11111).Second one has 2040 bits,which is arbitral and i must divide up 2040 bits to 24 outputs that means each output...

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