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After Changing the R11 to 5.1K & R18 to 18K. The voltage drop issue is not happening. However, we have been continuously testing the board for the last 2 days.Will update further
Which component is getting impacted ??? Is it the main IC or the COMP pin?
A bit of modification... Switching frequency is 100Khz in the actual design.
EN pin of the IC is pulled up to Vin_FLT with a pull up resistor.
SOM needs hardly 10-12 W of power . As I had mentioned earlier , DC-DC is working properly under all operating conditions. Except for when SOM is trying establish communication under low network area.
Should I add some extra Phase margin to the DC-DC converter control loop,???
Yes the design is done as per the datasheet even reviewed by the TI design experts.
The dc dc is designed for 13.8V,10A . The voltage drops even when the load is less than 3-4 A when the SOM module trying to connect with clound under low coverage area such as a basement.
Even we have checked...
We are facing an issue where the output of the DC-DC(12V) drops to 1-2 V for few milliseconds when an SOM module tries connecting with the cloud. The DC-DC is designed using LM5146 IC from texas instruments
This is mostly due to RF noise we suspect.
Can anyone suggest any shielding technique...
Has anyone used Vicor DC-DC ?
How are they able to achieve such small dimension for power rating exceeding 600W to 1000W?
Like what kind of topologies ,devices & switching frequency etc.
Anyone has done any kind of benchmarking
I am designing a 700W battery charger with boost PFC + half bridge LLC resonant converter.
LLC half bridge converter is digital controlled with a output voltage loop control.
We are seeing a ripple current of around 6-7 A when delivering 12 A dc at the output. You can see the attached pic...
Yes . There is no problem. Operation at minimum frequency is well above the capacitive mode.
Is it happening because of wrong or absence of soft start mechanism in LLC converter while integrating?
Should I power on each stage independently i.e. first PFC is powered on, 390Vdc is built in the...
Hii,
I am working on a 750 W battery charger project.
PFC topology
Boost topology with UCC28180 control IC from Texas instruments.
Switching frequency is 105khz
DC-DC topology
LLC half bridge converter(Split cap configuration) with secondary synchronous Mosfet.
Digital control technology...
I have checked the gate pulse via two different differential probes. The top(Blue colored ) is with low CMRR & BW probe & bottom one is with high BW &CMRR probe
I think you & other respected members suspected it rightly. The polarity of ringing is not reversing even after changing probe lead.
I am getting a high CMRR & BW probe to check this & update here in 1-2 days
I captured the following waveforms at the input side of the Isolator(U2;- ISO7220) that comes from processor & compared with gate pulses
Below waveform is when power board is off & only control card where processor sits.
High side pulse before isolator :- Yellow
Low side pulse before isolator...
Gate pulses for top , bottom Mosfets & drain to source voltages are all measured by differential probe with a BW of 25Mhz
1678172827
Yes it is split as two 20nF.
As it is for battery charging , Vout := 35-58Vdc
Vin = 390Vdc
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