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Recent content by bigworm

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    can true-single-phase divider work at very low speed?

    Hi, as the divider has to cover very wide freq range(0-2G), I want to use true-single-phase structure to design the DFF. I am not quite familiar with this. It works well for 2G with 0.18um process. Can it support as low as several MHz or KHz? Thanks!
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    Help on veriloga model

    Hi, To generate a bus of signals as the stimulus, I want to build a veriloga model. the input will be a voltage pwl source which in turn gives the voltage vaule versus time with a transition time. the output will be the corresponding bus value. For example, when input voltage is 6, the output...
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    How to simulate an analog module of ADC in Verilog AMS?

    verilog-ams examples if you have both scs and vams, you can try ade with using ams as simulator which does work. as for your question, to simualte in command line, I only have experience in using scs only nestlist. the script is like " spectre -arguments *.scs"
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    AMS+spectre problem with internal wire

    spectre problem well, the internal wire can't be accessed from ADE but it can be plotted in simvision, another cadence soft. you can have a try.
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    a question about AC simulation

    ac simulation hi guys, what 's the op for an AC simulation? I mean, when using spectre for ac simulation, different op means different gm etc. so before ac, simulator must know exact DC right? then another question, if I use monte-carlo ac simulation, will the dc varies as monte-carlo ac...
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    AMS+spectre problem with internal wire

    ams spectre Hi guys, I met with a problem when simulating both ams and spectre in ADE because I wanted to save an internal wire in ams. I want to check the tran voltage of an internal wire, but it seems that it can't be saved and plotted in ADE ( as what we normally do in spectre with...
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    How to size the dummy transistor

    i can,t agree with you more. always keep in mind that you may take the most of the dummy for those non-rf devices
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    200 pts - LNA design improvement

    corner frequency mosfet cadence spectre cascode current mirror will get you better psrr if there is headroom....
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    Capacitor question- AC maximum ratings ...

    Re: Capacitor question ... well, UR has similar meaning with "duty cycle" ?
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    why we need LNA input pad shielding

    Re: LNA input pad shielding yes . you do need to shield this pad. metal 1 is a good choice.
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    confusions on lna matching problem

    but, I think , when you design the LNA, (in my case, I use cadence icfb, simulation includes input matching and LNA), considering to some extent the parasitics, the NF you get from simulation is what you will more or less get in the measurement, right? it is not easy to get pure lna nf since...
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    A question on balun tuning

    and, I have one question, now in my design, the foundry provides several model of transformers, stacked and interleaved. and they provide the performance parameters. I wonder how to verify the performance? in my bench, one port of the primary is connect to 50ohm port (that is the case I will...
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    What's the meaning of die package and hermetic module?

    Re: die package? yes, in some cases, especially sensitive to cost , die is directly mounted on the pcb. after bond all pads of die to pcb pad, the die will be cover with glue ( actually , I don't know how to describe this, since it is one kind of black glue) and then, the whole pcb will be...
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    problems of RF passive mixer

    hi, I am not quite clear about "easier requirements for phase..." do you mean the phase imbalance of LNA will have less impact on the performance than that of amplitude? then extremely, there are some cases in IEEE paper, that the the positive output of passive mixer is fed the rf signal and...

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