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mixed-signal simulation
Hello people,
I hope that someone can give me some ideas concerning mixed-signal simulation. I have to simulate a memory built in Virtouso (Cadence), the cells and sense amplifiers, decoder are analog, input/output stages are digital. Additionally, I have a finctional...
Re: mixed-signal simulation
Ok, it could be possible to use Dolphin Smash, but how can I use it together with Cadence. The memory cells are designed by Skill, the periphery by Verilog, or it might be I see the problem in wrong way.[align=left] :?
mixed-signal simulation
Hello everybody,
I am doing mixed-signal simulation with Cadence SpectreVerilog. I have to apply test vectors to a memory. So, if someone knows: is it possible to use Verilog-XL if arrays are analog and periphery is digital? And, in general, I would like to get more...
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