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we are working on VLSI designs and the process that was given on the TMAX online help will be too tedious to do.
i check the violations that i encountered and on every library that was read, and it always points to the line "specify".
im thinking that "specify" is causing the unsupported...
I am running drc check on tetramax then an N2 (unsupported construct) warning was prompted. we have logic libraries that tetramax cant recognize. how can this be solve?
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