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Recent content by Ashvinikumar

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    RRAM (Resistive Random Access Memory)

    Hi, I have been trying to plot the DC characteristics for RRAM. I am getting the Transient characteristics correctly but when i do the DC sweep analysis it produces faulty results. even in the benchmark circuits provided by the RRAM model developers even in the DCC sweep analysis they apply...
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    bitline capacitance calculations for SRAM

    i am using 90nm PTM model for SRAM design and want calculate the bit line capacitance for which we have to find out the drain terminal capacitance of access transistor now the model file has cgdo = 1.9e-010 and cgdl = 2.653e-10,so my question is what these capacitance's actually mean and which...
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    how to vary the threshold voltage of a single transistor in a circuit?

    Hi... How do i reduce the threshold voltage(Vth) of a single NMOS transistor in a circuit?the model file specifies 0.37v(TSMC 90nm node) but for my circuit i need the Vth to be around 0.2v,applying body bias increases the threshold voltage,how to reduce the Vth?? Thank you in advance
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    how do i model NBTI in SILVACO

    Hi, I am working on NBTI aware SRAM so how do i model NBTI in SILVACO,do they provide any model file for NBTI if yes how to use them,if no in what way can i model NBTI in SILVACO (or any other tool)??? thank you...
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    how do i calculate the static and dynamic power of a circuit(SRAM) in SILVACO

    Hi, I am working on SRAM and wish to find the static and dynamic power,in TANNER we use a voltage source and ( .power ) command and get the power but it is not working on SILVACO.so how do we find out the same in SILVACO?? Thankyou
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    [SOLVED] how to do scaling of transistors???

    while designing a SRAM i want to do scaling of transistors,L(length) is fixed by the technology node (90nm) but how do i decide the minimum width for the transistors?
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    how to find the SNM of SRAM?how do i superimpose the two curves?

    Hi... how do i find out the SNM of a 6T SRAM cell?theoretically it's fine to understand but how do i superimpose the plot of two inverters and how do i find the largest square?
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    tanner files copied from one system to other doesn't show proper schematics

    thank you for your reply... i did the design on some other system so library paths are different and that system is not accessible now,is there any way to change the library paths of that design now on this system ? i tried to again include the .all file but it didn't help...!!!
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    tanner files copied from one system to other doesn't show proper schematics

    I copied the tanner files from my friends system to mine,but schematic is not opening properly,it shows boxes in place of transistors,all libraries are included still i am unable to solve it,can someone help it???
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    [SOLVED] the threshold voltage of a PMOS is -ve for example (-0.35),still why do we say that p

    yes i go it,thank you so much....
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    [SOLVED] the threshold voltage of a PMOS is -ve for example (-0.35),still why do we say that p

    "in an inverter we say when input in zero,PMOS is on and thus we get '1'(high) as output.now at 90nm node threshold voltage is -0.35 (approx) and thus to make this PMOS ON the gate voltage should be less than -0.35 (say for example -0.4)so how is this PMOS ON when GATE voltage is not below...
  12. A

    [SOLVED] the threshold voltage of a PMOS is -ve for example (-0.35),still why do we say that p

    The threshold voltage of a PMOS is -ve for example (-0.35),still why do we say that pmos is ON if a zero is applied at the GATE?pmos will be ON only if the GATE voltage is below -0.35...!!!am i right? can this concept be made more clear?
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