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I was trying to provide gate drive to an FET in a simple buck (see circuit.pdf) and was using a transformer for the purpose. I was first testing out the transformer by itself just to make sure it is OK. But when I give a square wave i/p (10V p-p 50% duty 150KHz) I get the waveform as attached...
Thanks Keith for your reply. I am attaching the circuit schematic here. The CCM-DCM1 block is a linearized model of the switching network that has the following form:
.subckt CCM-DCM1 1 2 3 4 5
+ params: L=100u fs=1E5
Et 1 2 value={(1-v(u))*v(3,4)/v(u)}
Gd 4 3 value={(1-v(u))*i(Et)/v(u)}
*...
How can I limit the voltage value of a net within a certain range in LTspice. For example, I want to supply a voltage to my model which will act as the duty cycle control so its value must be between 0 and 0.9, but the output of the Gcv block is higher and so I need to restrict it in the range...
I am getting the following message in LTspice. I tried incressing the trtol value but nothing seems to help. Does anyone know what this means.
Heightened Def Con from 0.00514743
++++++++++++++++++++++++++++++++++++++++++++++++++Fatal Error: Analysis: Time
step too small; time = 0.00514743...
Friends,
I need your help. What are the typical interview questions that might be asked if one is applying for an Applicaions engineering position for a 3-5 yr experience level position. The job is for a FET applications position to generate test ckts for lab evaluation, demo boards, thermal and...
Hello dick_freebird,
Thanks for your reply.
Regarding your comment on reverse recovery, even in a sync buck, when the freewheeling body diode of the LSS which is conducting during the dead time starts going OFF as switch node rises, the additional current it pulls will appear as a spike in...
Hi All,
Can anyone tell me given a sync buck converter with certain FETs, certain L's and C's and a certain gate driver, what should my experimental setup be to measure efficiency. Also how do I characterize/measure switching losses including reverse recovery losses v/s conduction loss?
Thanks
Thanks for your reply rdrdtheta. I am trying to understand DCM-CCM transition and DCM steady state operation for a syc buck converter using simple voltage-mode feedback. In CCM my duty cycle would be about 10% but I think it will have to be a bit higher in DCM. Also I want to understand how...
Friends,
When a converter is operated such that it operates in CCM and DCM depending on load, my understanding is that duty cycle will have to change when the converter is in DCM as compared to when it is in CCM. Furthermore, since M(=Vout/Vin) is a function of the load in DCM, the control will...
I guess what y'all are saying is since the FET is in the linear region when on it behaves as a resistor and current flow can be in any direction. Thanks for help on this.
I have used the following model of a transformer in the past. This is the spice for it. Basically on primary it is a "voltage dependant current source" with magnetizing inductance in parallel. And on secondary it is "voltage controlled voltage source"...
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